Low-power Applications of HART Communication

The primary communication method employed in analog transmitters is current loop technology, operating within a normal range of 4 mA to 20 mA, utilizing transmitters, receivers, and power supply equipment. This system enables multiple functions including remote calibration, fault diagnosis, and process variable data transmission. Low-power transmitters and receivers must operate at minimum currents of 4 mA or lower, depending on the required "margin" for error indication. These current loops demonstrate exceptional reliability and stability, exhibiting strong resistance to environmental interference during long-distance communication. However, a significant limitation is that single-loop configurations only support unidirectional communication (either from sensors or to actuators), allowing transmission of only one process variable at a time.

The introduction of HART standards provides a method for creating "smart" transmitters by adding digital communication capabilities while sharing the same twisted pair cable used for traditional 4 mA to 20 mA instruments. The 4 mA to 20 mA analog circuit is modulated by a 1 mA peak-to-peak FSK signal, maintaining loop operation margin without interrupting the original primary variable transmission. The HART protocol has become the global standard for transmitting and receiving digital signals between smart devices and control or monitoring systems via analog lines.

I.Internal Structure of HART Modem IC

The HART modem IC (Figure 2) integrates all essential functions including filtering, signal detection, demodulation, and signal generation, thereby significantly reducing the required number of external components. It adopts a compact 4 mm × 4 mm, 24-pin LFCSP package, requires only a single power supply ranging from 2 V to 5.5 V, and operates within an extended temperature range of-40°C to +125°C.

Figure 2. HART modem IC (including an internal 0.5% precision RC oscillator)

II.launch path

Figure 2 illustrates the key modules involved in modulation: the FSK Direct Digital Synthesis (DDS) engine, DAC (Switched Resistive String type), and buffers. Digital data to be transmitted is input through the UART interface. The modulator is activated by pulling the RTS (Request to Send) signal low. It converts the UART-encoded HART data bitstream from the TXD input into a series of binary signals at 1200 Hz ("1") and 2200 Hz ("0") (see Figure 3). The DDS generates sinusoidal digital word streams at either frequency, which the DAC transforms into approximately 493 mV p-p analog sine waves. These sine wave signals are internally buffered and output through the HART_OUT pin. The DDS engine itself produces continuous phase signals, eliminating output discontinuities during frequency switching. The primary advantage of internal buffering at HART_OUT lies in delivering high driving capability without requiring external analog buffers or their associated issues. The HART_OUT pin is DC-biased to 0.75 V and should be capacitively coupled to the load.

Figure 3. Modulator waveform

III.Receive path

When the RTS signal is at logic high level, the modulator is disabled and the demodulator is enabled, indicating that the modem operates in receive mode. The receiver demodulates the FSK modulated signal at the HART_IN pin. In this mode, the core modules include an internal bandpass filter, ADC, and DSP engine. A high CD level (carrier detection) signals the detection of a valid carrier. Demodulated data is transmitted to the main processor via the RXD pin on the UART interface.

The selection of this receiving architecture aims to enable the AD5700 to withstand noise and interference in harsh industrial environments. By combining analog and digital filtering techniques, exceptional sensitivity and highly precise output can be achieved at the RXD pin. The HART bitstream was originally structured as a standard UART frame containing a start bit, 8-bit data, a parity bit, and a stop bit. In demodulation mode, the modem offers two filter configuration options: internal filtering (where HART signals are applied to HART_IN) and external filtering (where filtered HART signals are directly applied to ADC_IP). The external filtering mode supports the AD5700 for use in explosion-proof and intrinsically safe environments. It incorporates a 150KΩ resistor to limit current levels sufficiently to meet intrinsic safety requirements. The modem must be isolated from high-voltage loop power supplies, which provides enhanced transient voltage protection at input terminals. This design eliminates the need for additional protection circuits even in the most demanding industrial environments.